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China 3D NAND memory research and development projects made new progress

Recently, the latest development of 3D NAND memory R & D projects jointly undertaken by the National Storage Base, the Yangtze River Storage Technology Co., Ltd. (hereinafter referred to as the "Yangtze River Storage") and the Institute of Microelectronics, Chinese Academy of Sciences.

According to the CEO of the Yangtze River Storage CEO Yang Shining in the IC coffee first international wisdom technology industry summit (ICTech Summit 2017) introduced, 32-layer 3D NAND chip successfully passed the electrical characteristics of the indicators test, to achieve the desired requirements.

The memory chip developed by the Yangtze River Storage and Microelectronics three-dimensional memory R & D center, in the microelectronics three-dimensional memory R & D center director, the Yangtze River storage NAND technology research and development project senior technical director Huo Zongliang under the leadership of the successful realization of the process devices and circuits Design of the entire set of technical verification, to the industrialization of the road has taken a symbolic significance of the key step.

Driven by large data needs, the memory chip is the field of electronic information to occupy the largest market share of integrated circuit products. China's long-term in the field of memory chips facing the market demand and independent intellectual property rights and the lack of key technology difficulties, to carry out large-capacity storage technology research and related product development is imminent. Traditional flat NAND memory reduces bottlenecks while reducing cost and increasing bit-to-bit crosstalk between devices. Seeking storage technology step by step breakthrough and innovation, is the development of the next generation of memory mainstream ideas. mqpi-18lp

3D NAND is an innovative semiconductor storage technology that increases the storage density by increasing the storage stack rather than reducing the two-dimensional size of the device, thereby broadening the storage space for storage technology, but the high complexity of its structure brings new challenge. Through the unremitting efforts, the technical team to overcome the high aspect ratio etching, high selection than etching, laminated film deposition, storage layer formation, metal gate formation and double exposure of metal lines and other key technical difficulties, to achieve multi-layer stack structure of 3D NAND array lay a solid foundation.

The reliability of the memory is an important part of the impact of product quality, the main assessment features include durability, data retention characteristics, coupling and disturbance, the international field of 3D NAND public research results are very limited. The device team through a large number of experiments and data analysis, to find a variety of factors affecting the reliability of various factors, and work closely with the technical team to complete the optimization of the reliability of the device indicators, the final success of the realization of all the reliability parameters.

At the circuit design level, the integrated R & D of stacked three-dimensional arrays faces more complex technical problems than planar NAND, and needs to be analyzed and optimized in combination with three-dimensional devices and array structure. The design team modeled the three-dimensional storage structure, using the programming based on the number of layers to read, read the voltage configuration, compensate for the device characteristics with the array of physical structure of the distribution differences, reducing the impact of unit crosstalk. And, the application of a number of innovative advanced design technology to ensure that the chip to achieve product-level features and performance indicators. lm3s2412-iqc25-a2

3D NAND memory chip research and development work has been the National Integrated Circuit Industry Fund, Violet Holdings, Hubei Province, China Core Investment, Hubei Province, the strong support of the vote.